AluVM rust implementation

Build Tests Lints codecov Docs unsafe forbidden MIT licensed

Rust implementation of AluVM (arithmetic logic unit virtual machine) and assembler from Alu Assembly language into bytecode.

AluVM is a pure functional register-based highly deterministic & exception-less instruction set architecture (ISA) and virtual machine (VM) without random memory access, capable of performing arithmetic operations, including operations on elliptic curves. The AluVM ISA can be extended by the environment running the virtual machine (host environment), providing ability to load data to the VM registers and support application-specific instructions (like SIMD).

The main purpose for ALuVM is to be used in distributed systems whether robustness, platform-independent determinism are more important than the speed of computation. The main area of AluVM applications (using appropriate ISA extensions) is blockchain environments, consensus-critical computations, edge computing, multiparty computing (including deterministic machine learning), client-side-validation, sandboxed computing and genetic algorithms.

For more details on AluVM, please check the specification, watch detailed presentation on YouTube or check slides from the presentation.


The robustness lies at the very core of AluVM. It is designed to avoid any undefined behaviour. Specifically,

Comparison table

Instruction Set Architecture

Instruction set architecture

Instruction opcodes

The arithmetic ISA is designed with strong robustness goals:

Most of the arithmetic operations has to be provided with flags specifying which of the encoding and exception handling should be used:

Thus, many arithmetic instructions have 8 variants, indicating the used encoding (unsigned, signed integer or float) and operation behavior in situation when resulting value does not fit into the register (overflow or wrap for integers and one of four rounding options for floats).

Check the specification for the details.


ALU registers: 8 blocks of 32 registers

Control flow registers: